Pradheep Kaliraj
ASIC Verification Engineer
San Jose, California, United States
Summary
🤩
Rockstar🎓
Top SchoolPradheep Kaliraj is an ASIC Verification Engineer with 7 years of hands-on experience in RTL design, functional and mixed-signal verification, and on-chip interconnects, currently working at Google in San Jose. He has led metric-driven verification programs for automotive and power-management ICs, architecting reusable UVM testbenches, writing SV assertions, and applying formal techniques to accelerate verification and meet ISO26262/ASIL requirements. His background spans DRAM and PHY IPs through power and USB/BMS designs, giving him deep expertise in protocol interfaces (I2C, SPI, UART, DDR4) and analog–digital co-simulation using Verilog-AMS and EEnets. Pradheep pairs practical pre/post-silicon debug and ATE vector generation with automation of regression flows, and his grad research on photonic NoC reliability reflects a longstanding interest in computer architecture and interconnect performance. He brings a mix of methodological rigor and cross-disciplinary collaboration, often working closely with analog designers and vendors to integrate verification IP and models.
7 years of coding experience
10 years of employment as a software developer
Master of Science, Computer engineering, Master of Science, Computer engineering at Rochester Institute of TechnologyAnna University, Chennai
English
Github Skills (46)
cyclone10
intel9
lattice9
xilinx9
verification9
risc9
fpga9
risc-v8
bitstream8
vivado8
authentication7
api7
cli6
aws6
aws-lambda6
Programming languages (6)
Github contributions (5)
pradheepkaliraj/hello_world
Jul 2018 - Apr 2023
tutorial
Contributions:2 PRs, 4 pushes, 3 branches in 4 years 9 months
react
pradheepkaliraj/basics-graphics-music
May 2024 - Sep 2024
Make this repository work with all boards
Contributions:11 PRs, 15 pushes, 2 branches in 4 months
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