Pramod Mallya

Principal Product Engineer at Cadence Design Systems

San Jose, California, United States
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Summary

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Senior
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Top School
Pramod Mallya is a Principal Product Engineer based in San Jose with 11 years of experience across semiconductor design, verification, and product engineering at Cadence and Intel. He brings deep hands-on expertise from RTL and UVM verification to physical design and STA, plus practical automation skills in Perl, Python and shell scripting that accelerate silicon bring-up and validation cycles. His background spans pre- and post-silicon workflows—emulation, parasitics extraction, and post-layout validation—complemented by IoT prototyping and device simulation research from IISc and ASU. Known for bridging architecture-level understanding with low-level implementation, he reliably navigates both front-end design and back-end signoff challenges. A pragmatic engineer, he pairs academic rigor in VLSI with product-focused delivery at scale in leading EDA and semiconductor environments.
code11 years of coding experience
job6 years of employment as a software developer
bookProficiency Certification Advanced Sensor Technologies, Proficiency Certification Advanced Sensor Technologies at Indian Institute of Science (IISc)
bookMaster's degree Electrical and Electronics Engineering, Master's degree Electrical and Electronics Engineering at Arizona State University
bookBachelor Of Engineering (B.E) Electronics And Communications Engineering, Bachelor Of Engineering (B.E) Electronics And Communications Engineering at Visvesvaraya Technological University
languagesEnglish, German, Konkani, Hindi, Kannada
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Github Skills (2)

router2
verilog1

Github contributions (4)

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pmallya/VLSI_LAB4

Mar 2015 - Apr 2015

Contributions:40 commits, 39 pushes, 1 branch in 1 month
verilogrouterrouting
pmallya/verilog_logic_blocks

May 2016 - Jul 2016

Contributions:8 pushes, 1 branch, 1 comment in 2 months
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Pramod Mallya - Principal Product Engineer at Cadence Design Systems