Prasad Pandit is an ASIC engineer with 11 years of experience specializing in high-performance RTL logic and CPU/processor design, currently working at Meta from Austin. He brings deep expertise in computer architecture, embedded systems, and rapid hardware prototyping, with a track record of delivering multiple IPs and tapeout-validated blocks across Qualcomm, Cirrus Logic, and FPGA platforms. Pragmatic and hands-on, he follows a "learn by doing" approach and favors simple, synchronous solutions that scale from verification testbenches to silicon. He is an active contributor to hardware open-source projects (GitHub: prasadp4009), blending academic rigor from a master's at Portland State with industrial experience in CPU/GPU logic and UVM-based verification. Notably, his background spans both driver-level Linux development and high-frequency PHY/IP work validated on Zynq and Stratix devices, giving him rare end-to-end system perspective.
11 years of coding experience
12 years of employment as a software developer
Bachelor of Engineering, Electronics Engineering, Bachelor of Engineering, Electronics Engineering at G.H. Raisoni College of Engineering(GHRCE), Nagpur
Master’s Degree, Electrical and Computer Engineering, Master’s Degree, Electrical and Computer Engineering at Portland State University
SSC, SSC at Somalwar High School, Ramdaspeth
HSC, HSC at Hislop College, Temple Road, Civil Lines, Nagpur
Contributions:12 commits, 10 pushes, 3 branches in 1 month
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