Qing Yang
DAC ADC Chip Validation
San Francisco Bay Area United States
Summary
🤩
Rockstar🎓
Top SchoolQing Yang is an RF validation engineer with over a decade of hands-on experience across chip, module and system-level RF work, currently validating DAC/ADC performance at Intel in the San Jose Bay Area. She has deep bench expertise with Keysight and Rohde & Schwarz instrumentation, automated RF test flows with Python, and a strong track record debugging EVM, SNR, spurs, IMD and calibration issues for Wi‑Fi, Bluetooth and high‑power amplifiers. Her background spans product compliance testing (FCC/ETSI/KCC/Japan), layout review for RF transmit chains, and tuning of high‑power GSM and 5G filter/amplifier stages from roles at Meta, ZTE and Motorola. Colleagues rely on her ability to link bench measurements to layout or circuit root causes, and she pairs practical lab skills with simulation familiarity (ADS/HFSS). A detail often missed: she’s comfortable owning both low‑level RF hardware tuning and higher‑level automated validation pipelines, bridging lab engineering and test automation.
10 years of coding experience
16 years of employment as a software developer
Bachelor's degree, Electrical, Electronic and Communications Engineering Technology/Technician, Bachelor's degree, Electrical, Electronic and Communications Engineering Technology/Technician at Huaqiao UniversityMaster's degree, Microwave Engineering, Master's degree, Microwave Engineering at Shanghai East Normal University
Github Skills (78)
neural-rendering10
falcon10
alpaca10
transformers9
gpu9
pytorch9
llm9
llamacpp9
keras9
generative-model9
pytorch3d9
bloom9
tvm8
golang8
python8
Programming languages (4)
Github contributions (5)
yangqing-yq/librealsense-android
Aug 2018 - Aug 2018
Contributions:7 commits, 2 PRs, 4 pushes in 1 day
yangqing-yq/librealsense-example-code
Oct 2018 - Apr 2019
Contributions:1 push, 1 branch in 6 months
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