Rafael Calcada
Associate Software Engineer
Eindhoven, North Brabant, Netherlands
Summary
👤
Senior🎓
Top SchoolRafael Calcada is an associate software engineer with nine years of experience building EDA tools and digital design IP, currently developing quality-assurance software for integrated circuit verification at Siemens EDA in Eindhoven. He combines C/C++ and Python expertise with a deep practical knowledge of chip-design formats and standards such as Verilog, Liberty, LEF/DEF, GDSII, and SPICE. Prior roles include R&D work on ultra-low-power backscatter wireless IP and hands-on digital design, giving him cross-domain fluency between hardware description and verification tooling. Rafael is also the creator and maintainer of RVX, an open-source RISC-V microcontroller core, reflecting his commitment to reproducible hardware design and community-driven projects. Comfortable working across research and product contexts, he brings a pragmatic engineer’s mindset and a track record of turning complex design rules into automated, reliable checks.
9 years of coding experience
2 years of employment as a software developer
Engineer's degree, Computer Engineering, Engineer's degree, Computer Engineering at Federal University of Rio Grande do Sul
English, Portuguese, Dutch
Github Skills (40)
uart10
risc-v10
cpu10
spi10
gpio10
risc10
system-on-chip10
openembedded10
processor10
eda9
microcontroller9
gnu9
gnuradio8
instruction-set8
mcu8
Programming languages (4)
Github contributions (5)
rafaelcalcada/rvx
May 2020 - Dec 2022
RISC-V 32-bit microcontroller developed in Verilog
Contributions:3 releases, 27 reviews, 205 commits in 2 years 7 months
risc-vsteelriscvedarisc
rafaelcalcada/aigbdd
Dec 2019 - Dec 2019
Contributions:43 commits, 56 pushes, 1 branch in 3 days
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