Rajiv Deodhar
Sr. Staff Engineer at Intel Corp.
Phoenix, Arizona Area United States
Summary
🤩
Rockstar🎓
Top SchoolRajiv Deodhar is a seasoned Sr. Staff Engineer and compiler architect with decades of experience at Intel, specializing in compiler design, processor offloading, and network processor architectures. He led development of MIC (Xeon Phi) offloading language extensions, architected compilers for IXP network processors and the Itanium team, and managed the i960 software tools and compiler efforts. His background blends deep electrical engineering roots from IIT Bombay with advanced computer science training, enabling him to bridge hardware and software at the toolchain level. Based in Phoenix, he remains focused on high-performance computing and embedded processor toolchains, with a track record of shipping production compilers for specialized architectures. Less obvious: his career reflects sustained influence on multiple generations of Intel processor toolchains, showing both hands-on implementation and long-term architectural impact.
6 years of coding experience
7 years of employment as a software developer
Indian Institute of Technology Bombay
Github Skills (12)
staging10
sycl10
oneapi10
intel10
llvm10
desktop9
windows9
color-picker8
powertoys7
llvm-ir5
translation4
monorepo2
Programming languages (5)
Github contributions (5)
rdeodhar/llvm-test-suite
Jan 2021 - Mar 2023
Contributions:150 pushes, 47 branches in 2 years 2 months
rdeodhar/unified-runtime
Jun 2023 - Mar 2024
Contributions:18 pushes, 6 branches in 9 months
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