Ravikumar M
Founder at IEEE
Mysuru, Karnataka, India
Summary
👤
Senior🎓
Top SchoolRavikumar M is a founder and RTL engineer specializing in VLSI design and digital systems, combining eight years of hands-on practice with formal studies in Electronics and Communication Engineering at PES College of Engineering, Mandya. He has practical experience across ASIC/FPGA flows, Verilog HDL, and tools like Xilinx Vivado and ModelSim, and is actively expanding into SystemVerilog and functional verification. As founder of Chip-Forge Technology and an RTL engineer at RJ Semiconductor, he blends technical implementation with company management and publication responsibilities. An IEEE member and self-described "addicted to open source chip design," he pursues collaborative learning and contributes to the semiconductor community. Based in Mysuru, Karnataka, he is focused on securing internships and partnerships that translate academic projects into real-world silicon and embedded solutions. Notably, his profile reflects both a developer’s depth in RTL tooling and an entrepreneurial drive to commercialize chip-design work.
8 years of coding experience
Bachelor of Engineering - BE, Electronics and Communication Engineering, Bachelor of Engineering - BE, Electronics and Communication Engineering at PES College of Engineering, Mandya
Github Skills (3)
php5
react3
kubernetes1
Programming languages (2)
Github contributions (5)
chipforge/PearlRiver
May 2018 - Feb 2019
1st Testwafer for LibreSilicon
Contributions:2 PRs, 99 pushes, 1 branch in 8 months
php
chipforge/StdCellLib
Jan 2018 - Oct 2018
LibreSilicon's Standard Cell Library
Contributions:41 commits, 5 PRs, 448 pushes in 8 months
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