Reed Foster
Graduate Research Assistant
Cambridge, Massachusetts, United States
Summary
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Senior🎓
Top SchoolReed Foster is a graduate researcher and FPGA/RTL engineer with 10 years of experience at the intersection of superconducting devices, analog/digital microelectronics, and computer architecture. Based in Cambridge and embedded in MIT’s Quantum Nanostructures group, he designs and fabricates circuits while building custom analog front ends and multi-GS/s RFSoC firmware to accelerate characterization of nanowire and microwave superconducting systems. His work bridges hands-on nanofabrication and system-level engineering, culminating in a first-author Applied Physics Letters publication and presentations of superconducting digital circuits internationally. Reed has practical space and telecom experience from Astranis and NASA and has deployed core RTL on cloud FPGAs at SiFive, showing a knack for moving experimental hardware into production-like environments. He is particularly interested in how novel devices — from superconducting nanowires to photonic and reconfigurable logic — can reshape system architectures, and he often combines EM modeling, analog design, and FPGA firmware in single projects.
10 years of coding experience
2 years of employment as a software developer
Master of Engineering - MEng Electrical Engineering and Computer Science, Master of Engineering - MEng Electrical Engineering and Computer Science at Massachusetts Institute of Technology
Stackoverflow
1reputation
0reached
0answers
0questions
Github Skills (26)
bit8
boolean7
layout7
8-bit6
placement6
fpga5
meter5
vhdl5
python5
geometry5
cad4
bootstrapping2
modularity2
google-scholar2
google-alerts2
Programming languages (4)
Github contributions (5)
reed-foster/r32
Feb 2017 - Sep 2017
Contributions:121 commits, 98 pushes, 1 branch in 6 months
reed-foster/fpga-pitch-shifter
Jan 2020 - Apr 2024
an implementation of autotune on an FPGA
Contributions:4 PRs, 33 pushes, 1 branch in 4 years 3 months
autotuneplacementfpgamodularity
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