Richard Cooper
Principal Software Engineer at Arm
Cambridge, England, United Kingdom
Summary
🤩
Rockstar🎓
Top SchoolRichard Cooper is a Principal Software Engineer and research-focused leader with over two decades of experience building simulation, R&D software and FPGA hardware, currently leading Arm’s Modelling and Simulation team. He is a core contributor and system architect on the widely used open-source gem5 CPU simulator, improving robustness, Python 3 support and full-system configuration for Arm binaries. His background spans broadcast video, real-time 4K image processing, and software-defined networking, where he has delivered bit-accurate C-models, OFX plugins and FPGA video effects. Comfortable switching domains and languages, he actively draws on computer science theory to inform pragmatic engineering decisions in his core toolset. Having worked across the UK and Japan, he combines international collaboration skills with hands-on technical leadership of small R&D teams. Colleagues rely on him for bridging deep-system modelling expertise with production-grade engineering practices.
6 years of coding experience
21 years of employment as a software developer
Master of Engineering - MEng Electrical and Electronics Engineering, Master of Engineering - MEng Electrical and Electronics Engineering at Imperial College London
English, Japanese
Github Skills (18)
simulation10
c-language10
python10
computer-architecture10
architecture10
simulations10
cprogramming-language10
architectures10
scripting9
configuration-management9
open-source9
system9
performance-tuning8
performance-analysis8
performance-measurement8
Programming languages (2)
Github contributions (5)
gem5/gem5
Apr 2020 - Jun 2022
The official repository for the gem5 computer-system architecture simulator.
Role in this project:
Back-end Developer & System Architect
Back-end Developer & System ArchitectContributions:19 reviews, 21 commits, 6 PRs in 2 years 2 months
Contributions summary:Richard contributed to the gem5 computer-system architecture simulator by addressing various aspects of its functionality and architecture. Their work involved fixing bugs related to the simulator's image creation and disk partitioning tools, and also included refactoring code to support Python 3 and improve the robustness of the sfdisk parsing. They also made adjustments to system configuration files, including updates for Arm full-system binaries, and added functionalities like the PMU and Tarmac tracing options to configuration scripts. They also added code to improve the handling of system-level events, like kernel panics.
storedsimulationupstreamsimulatorgem5-simulator
rjc-arch/gem5
Oct 2023 - Mar 2025
The official repository for the gem5 computer-system architecture simulator.
Contributions:10 pushes, 7 branches in 1 year 5 months
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