Richard Lin is a hardware-software engineer with 13 years of experience bridging programming languages and physical computing, recently completing a postdoc in electrical and computer engineering at UCLA. He builds developer-friendly HDL and compiler toolchains—work published at top venues (ACM CHI, UIST) and released as open source (e.g., the PolymorphicBlocks compiler and contributions to Chisel/FIRRTL). Equally comfortable in Python, Scala, and C++, he pairs embedded firmware and board-level hardware design with compiler and tooling improvements that make electronics more accessible to novices and more productive for experts. His practical track record includes 25+ demo boards (IoT devices, test equipment, robot controllers), contributions to widely used projects like Chisel and mbed-os, and a decade-plus of hands-on systems work with the Berkeley solar car program. Colleagues can expect a research-driven engineer who ships usable tools and keeps a playful attention to detail (and an affinity for plush ducks).
13 years of coding experience
9 years of employment as a software developer
Ph. D., Computer Science, Ph. D., Computer Science at University of California, Berkeley
Generator Bootcamp Material: Learn Chisel the Right Way
Role in this project:
Backend Developer
Contributions:5 reviews, 29 commits, 2 PRs in 2 years 6 months
Contributions summary:Richard contributed to a Chisel bootcamp repository, demonstrating a strong understanding of hardware design using the Chisel language. The commits focused on adding and implementing fundamental digital logic components, such as shift registers, and combinational logic, using Scala within the Chisel environment. The work involved developing and testing these hardware modules, which are building blocks for digital circuits.
Software Engineer (focus on hardware design and verification)
Contributions:35 reviews, 316 commits, 150 PRs in 3 years 10 months
Contributions summary:Richard contributed to the Chisel hardware description language project by implementing and documenting core language features. Their commits focused on enhancing the language's capabilities, such as adding a new Vec constructor and providing API documentation for key components. The user also addressed style and documentation issues, improving code readability and maintainability within the Chisel library.
rtlasicvhdllanguage-designeda
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