Ricki Tura
Senior Verification Engineer
Bristol, England, United Kingdom
Summary
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Senior🎓
Top SchoolRicki Tura is a Senior Verification Engineer with nine years’ experience specialising in UVM-based verification, RISC-V cores, and building automated, scalable verification and packaging flows. At Codasip and previously Siemens/Mentor, he has led core and block-level CPU verification, developed a bespoke RISC-V architectural coverage tool, and integrated YAML-driven nightly regressions into Jenkins/VRM/VIQ pipelines. He combines hands-on RTL/netlist work, synthesis familiarity and ELF/toolchain experience with practical DevOps skills—Ansible, SGE grids and Grafana dashboards—to keep verification estates reliable and reproducible. A former UKESF Scholar of the Year who mentors early-career engineers, he has a track record of turning complex verification requirements into maintainable, CI-friendly systems and has repeatedly automated deliverables to work out-of-the-box across simulators and benches.
9 years of coding experience
6 years of employment as a software developer
Master’s Degree, Electrical and Electronic Engineering with Industrial Studies, Master’s Degree, Electrical and Electronic Engineering with Industrial Studies at University of SouthamptonSixth Form, A-Levels, Sixth Form, A-Levels at Thomas Deacon AcademySecondary School, GCSEs, Secondary School, GCSEs at Thomas Clarkson AcademyMaster's degree (Exchange), Electrical and Electronic Engineering with Industrial Studies, Master's degree (Exchange), Electrical and Electronic Engineering with Industrial Studies at National University of Singapore
English, French, Chinese, Punjabi
Stackoverflow
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0reached
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Github Skills (1)
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Github contributions (1)
deodvlper/D5-Software
Mar 2017 - Mar 2017
Contributions:48 commits, 22 PRs, 53 pushes in 17 days
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