Ritesh Gupta
Research Associate III
Delhi, India
Summary
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Senior🎓
Top SchoolRitesh Gupta is a Research Associate III with over a decade of hands-on experience in semiconductor device physics, TCAD simulation, and analytical modeling, holding a Ph.D. in Electronic Science from Delhi University. He has led development and optimization of advanced HEMT and MOSFET architectures (including DGHEMT, misaligned DG MOSFETs, graded-channel designs and T‑gate/metal‑insulator geometries) on multiple DST, DRDO and CSIR sponsored projects. Expert in SILVACO ATLAS/DevEDIT/Mixed‑Mode, SPICE/ORCAD/ADS, MathCAD and C-based numerical simulation, he bridges device-level physics with circuit-parameter extraction to inform RF and high-speed device design. A consistent individual contributor and mentor, he frequently translates complex two-dimensional carrier quantization and gate-misalignment effects into practical, compact models used for parameter extraction and optimization. Based in Delhi, he seeks opportunities to apply his deep TCAD and analytical-modeling skillset to industry challenges where device innovation directly improves circuit performance. An uncommon strength is his track record of converting nuanced physical phenomena into simplified, implementable models that aid both simulation fidelity and design productivity.
10 years of coding experience
3 years of employment as a software developer
depth; Bachelor; B. Sc, electronics; quantum and nuclear physics; Physics, depth; Bachelor; B. Sc, electronics; quantum and nuclear physics; Physics at solid stateUniversity of DelhiSaraswati Vihar, Delhi, IndiaProgramming languages (1)
Github contributions (1)
marcelstoer/nodemcu-custom-build
May 2016 - Jun 2017
Contributions:3 commits in 1 year 1 month
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