Summary
Ritesh Patel is a Senior Deep Learning Architect with 15 years of experience optimizing ML performance across GPUs and large-scale clusters, currently focusing on end-to-end training performance for LLMs at NVIDIA. He has led performance model development and software-hardware co-design at Google and Intel, building predictive cost models for core ML ops (GEMM, convs, fusions) and influencing TPU/GPU architecture decisions. Ritesh combines low-level kernel implementation expertise with system-level profiling to drive tangible speedups—authoring cycle-accurate simulators and highly optimized compute shaders earlier in his career. His background includes building control systems for precision manufacturing and translating hardware behavior into actionable software optimizations, a blend that helps him spot non-obvious bottlenecks across the stack. Based in Sacramento, he brings deep practical experience in performance pathfinding, sharding/scheduling strategies, and operation fusion techniques that accelerate production-scale ML training.
15 years of coding experience
14 years of employment as a software developer
Master of Science (M.S.) Electrical and Computer Engineering, Master of Science (M.S.) Electrical and Computer Engineering at University of California, Davis
English, Gujarati