Robert Matyjewicz is a Senior Member of Technical Staff at AMD with a decade of experience focused on design-for-test (DFT) and memory built-in self-test (MBIST) for complex SoCs. He has built and maintained MBIST insertion and full-SoC DV flows that dramatically reduced post-insertion bring-up time, earning internal innovation awards and cross-team adoption. His background spans ATPG and scan optimization, vendor tools (Synopsys/Mentor), and hands-on resolution of tool and flow bugs, enabling reliable tapeouts across IP and SOC teams. Comfortable both writing flow automation (including partitioned gatesim work in Ruby) and mentoring multiple SOC teams in parallel, he blends deep technical craftsmanship with practical process improvements. Based in Old Toronto, he pairs a strong University of Toronto computer engineering foundation (3.75/4.0) with a track record of delivering measurable DFT impact at scale.
10 years of coding experience
6 years of employment as a software developer
Bachelor of Applied Science - BASc, Computer Engineering, 3.75/4.0 cumulative GPA or 85.35 cumulative average., Bachelor of Applied Science - BASc, Computer Engineering, 3.75/4.0 cumulative GPA or 85.35 cumulative average. at University of Toronto
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Robert Matyjewicz - Senior Member Of Technical Staff at AMD