Rok Krajnc
Senior Engineer at RLS Merilna tehnika d. o. o.
Slovenia
Summary
👤
Senior🎓
Top SchoolRok Krajnc is a senior hardware/software engineer with 14 years of experience designing and verifying semiconductor systems, currently leading engineering work at RLS Merilna tehnika. He combines deep RTL expertise in SystemVerilog/Verilog/VHDL with embedded software skills in C/C++ and Python, bridging ASIC/firmware development from Aptina and ON Semiconductor to product-focused roles. Rok’s background spans full lifecycle HDL planning, design and verification, and practical firmware deployment—making him effective at turning complex silicon requirements into shipping products. Based in Slovenia and educated at Fakulteta za elektrotehniko Ljubljana, he brings a pragmatic systems mindset and a track record of moving between low-level design and applied embedded solutions.
15 years of coding experience
13 years of employment as a software developer
Gimnazija TrbovljeFakulteta za elektrotehniko
Stackoverflow
1reputation
0reached
0answers
0questions
Github Skills (42)
verilog10
sega10
amiga10
commodore10
genesis10
sega-genesis10
zx-spectrum10
fpga10
6800010
megadrive10
8-bit10
apple210
retrocomputing10
arcade10
cicd9
Programming languages (5)
Github contributions (5)
rkrajnc/minimig-de1
Dec 2011 - Apr 2022
Minimig for the DE1 board
Contributions:537 commits, 2 PRs, 2 pushes in 10 years 6 months
arcade68000amigaapple2commodore
rkrajnc/minimig-upstream
Oct 2012 - Feb 2016
Contributions:42 commits, 5 pushes, 4 tags in 3 years 4 months
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