Ryan Marlow
Mentor at R L Marlow Consulting LLC
Durham, North Carolina, United States
Summary
👤
Senior🎓
Top SchoolRyan Marlow is an FPGA and SDR-focused engineer and founder with a decade of experience building hardware-software systems, from low-level FPGA architecture and Vivado/TCL automation to embedded C/C++ and GNU Radio development. He runs R L Marlow Consulting, contributes to high-profile open-source USRP/UHD and FPGA projects—adding DDC/DUC improvements, DMA and clocking features—and has hands-on experience enabling SFP/QSFP and Aurora interfaces. Based in Durham, NC, he mentors volunteers and maintains a track record of practical EDA tooling and HW/SW co-design for real-world radio systems. His background blends a Virginia Tech MS/BS in Computer Engineering with a pragmatic consulting approach, and he often bridges research-grade hardware projects to deployable embedded solutions.
11 years of coding experience
5 years of employment as a software developer
Bachelor of Science - BS, Computer Engineering, Bachelor of Science - BS, Computer Engineering at Virginia Tech
Github Skills (17)
verilog10
c-language10
sdl10
signal-processing10
digital-signal-processing10
driver10
sys10
fpga10
embedded10
uhd10
cprogramming-language10
python9
device-driver9
sftp9
aurora9
Programming languages (2)
Github contributions (5)
EttusResearch/fpga
Sep 2017 - Aug 2018
The USRP™ Hardware Driver FPGA Repository
Role in this project:
Embedded Systems Engineer / IoT Developer
Embedded Systems Engineer / IoT DeveloperContributions:17 commits in 11 months
Contributions summary:Ryan primarily worked on FPGA-related code within the repository. Their contributions involved parameterizing and updating Digital Down Converter (DDC) and Digital Up Converter (DUC) blocks, a key component in software-defined radio systems. They fixed simulation bugs and enabled build configurations for Serial Front Panel Data Port (SFP) interfaces, indicating a focus on hardware-software integration. The user also refactored SFP and Aurora components and incorporated new features for NPIO and QSFP interfaces, indicating a solid understanding of hardware design and integration.
driverfpgahardwareusrp
EttusResearch/uhd
Sep 2017 - Jul 2018
The USRP™ Hardware Driver Repository
Role in this project:Embedded Systems Engineer / IoT Developer
Embedded Systems Engineer / IoT DeveloperContributions:7 commits in 9 months
Contributions summary:Ryan primarily focused on enhancing the USRP™ Hardware Driver, particularly the dma_fifo and DDC/DUC blocks. Their contributions involved implementing features such as readback registers for clock rates and compatibility numbers, improving throughput calculations, and introducing new parameters. They also modified the n3xx and e320 periph_manager files adding bridge mode support and ref clock functionalities for the n310. Additional changes included refactoring variable names and updating code related to the EISCAT project.
driverhardwareusrpuhdsdr
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