Saad Khalid

Senior Verification Engineer

Cambridge, England, United Kingdom
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Summary

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Rockstar
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Saad Khalid is a Senior Verification Engineer with six years’ experience specializing in RISC-V core verification, SystemVerilog/UVM, CHISEL, Verilog, and C/C++. He has driven verification for Linux-capable, multi-privilege cores with MMU and ePMP support at organizations from research (BSC) to industry leaders (Imagination, AMD), repeatedly catching critical RTL bugs via directed and randomized tests and co-simulation against Spike. Skilled in automation with Python, Ruby and Bash, he builds efficient, reusable test infrastructure and documentation that reduces duplicated effort across teams. Saad’s hands-on work spans unit-level pipeline stress tests to top-level multi-tile NOC verification, and he has practical experience validating complex features like SV39/SV48 virtual memory and RISC-V vector support. Colleagues rely on him for thoughtful test planning and mentoring, and he brings an unusual mix of deep ISA-level knowledge and pragmatic tooling experience to verification delivery.
code6 years of coding experience
job5 years of employment as a software developer
bookHigh School Pre-Engineering, High School Pre-Engineering at Government College University (GCU), Lahore
bookBachelor of Engineering Electrical Engineering, Bachelor of Engineering Electrical Engineering at University of Engineering and Technology, Lahore
languagesUrdu, Punjabi, English, Chinese, Spanish
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Github Skills (16)

32-bit10
cpu10
risc-v10
bit10
risc10
openembedded10
hardware10
computer-engineering9
spike9
simulator8
computer-architecture7
verification6
soc3
asic2
fpga2

Programming languages (4)

SystemVerilogCVerilogPython

Github contributions (5)

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Saad525/ibex

Nov 2022 - Feb 2023

Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
Contributions:38 pushes, 15 branches in 3 months
risc-vcpuzeroibex32-bit
Saad525/LM_RIA

Feb 2020 - Oct 2020

LM RISC-V Inverse Assembler
Contributions:2 PRs, 10 pushes, 3 branches in 7 months
risc-vriscassemblerinverse
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Saad Khalid - Senior Verification Engineer