Saad Khalid is a Senior Verification Engineer with six years’ experience specializing in RISC-V core verification, SystemVerilog/UVM, CHISEL, Verilog, and C/C++. He has driven verification for Linux-capable, multi-privilege cores with MMU and ePMP support at organizations from research (BSC) to industry leaders (Imagination, AMD), repeatedly catching critical RTL bugs via directed and randomized tests and co-simulation against Spike. Skilled in automation with Python, Ruby and Bash, he builds efficient, reusable test infrastructure and documentation that reduces duplicated effort across teams. Saad’s hands-on work spans unit-level pipeline stress tests to top-level multi-tile NOC verification, and he has practical experience validating complex features like SV39/SV48 virtual memory and RISC-V vector support. Colleagues rely on him for thoughtful test planning and mentoring, and he brings an unusual mix of deep ISA-level knowledge and pragmatic tooling experience to verification delivery.
6 years of coding experience
5 years of employment as a software developer
High School Pre-Engineering, High School Pre-Engineering at Government College University (GCU), Lahore
Bachelor of Engineering Electrical Engineering, Bachelor of Engineering Electrical Engineering at University of Engineering and Technology, Lahore
Contributions:2 PRs, 10 pushes, 3 branches in 7 months
risc-vriscassemblerinverse
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