Sagar Thapaliya
AI HPC Systems Performance Engineer at Meta
Austin, Texas, United States
Summary
👤
Senior🎓
Top SchoolSagar Thapaliya is an AI HPC Systems Performance Engineer with nine years of experience optimizing large-scale compute and storage stacks for extreme-scale environments. He has deep expertise in HPC communication middleware (MPICH, oneCCL), RDMA, collective communications, and parallel file systems, and has driven performance tuning and cluster bring-ups across national lab-scale projects. His PhD research specialized in I/O optimization for HPC storage, informing practical work on burst buffers, NVM/SSD integration, and scalable runtimes at Intel. A significant contributor to the Aurora exascale effort and an active committer to the official MPICH repository (notably CH4/OFI and lockless threading improvements), he blends research rigor with production-grade systems engineering. Now based in Austin and focused on AI infrastructure, he applies large-scale performance lessons to accelerate training systems and distributed runtimes. Colleagues rely on him for cross-functional tuning where low-level kernel, library, and cluster-level changes intersect to deliver measurable throughput and latency gains.
9 years of coding experience
15 years of employment as a software developer
Doctor of Philosophy (PhD) / Master's Degree Computer Science, Doctor of Philosophy (PhD) / Master's Degree Computer Science at University of Alabama at BirminghamBachelor's degree Computer Engineering, Bachelor's degree Computer Engineering at Nepal jobs
Github Skills (8)
c1710
fortran10
mpi10
hpc10
c1110
multithreading10
atomics9
atomic9
Programming languages (1)
Github contributions (5)
pmodels/mpich
Apr 2017 - Aug 2022
Official MPICH Repository
Role in this project:
Back-end Developer
Back-end DeveloperContributions:124 reviews, 232 commits, 43 PRs in 5 years 5 months
Contributions summary:Sagar primarily focused on the MPICH library's core functionality, particularly within the CH4 communication layer and its integration with the Open Fabrics Interfaces (OFI). Contributions include refactoring and optimizing code related to message handling, the management of virtual communication interfaces (VCIs), and improving the handling of memory access and data transfer operations. The user also added features related to multi-threading models (e.g., lockless threading), including associated locking mechanisms and atomic operations to ensure thread safety. Several patches included were aimed at improving the performance of the probing functionality of the application.
fortranhpcmpic
sagarth/mpich
Jun 2017 - Apr 2024
Official MPICH Repository
Contributions:243 pushes, 61 branches in 6 years 10 months
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