Sai Pisati is an aspiring VLSI and computer architecture engineer currently pursuing an MS in Computer Engineering at NC State, with eight years of hands-on experience across academia and research. As a Student Laboratory Assistant and former research intern, he has practical RTL design and verification experience, plus a measurable track record optimizing low-noise amplifiers and reducing noise by 28% in high-speed receiver circuits. Proficient in SystemVerilog, C/C++, Python, and scripting, he bridges microarchitecture concepts with circuit-level understanding to tackle power and timing challenges. Actively seeking Spring 2024 co-op or full-time roles in RTL design, DV, or architecture, he brings both simulation/PSPICE validation and static timing analysis skills. Based in Raleigh, he pairs strong academic performance with tangible research deliverables and a knack for translating analog insights into digital verification improvements.
8 years of coding experience
Master of Science - MS, Computer Engineering, Master of Science - MS, Computer Engineering at North Carolina State University
Bachelor of Technology - BTech, Electrical, Electronics and Communications Engineering, 8.94, Bachelor of Technology - BTech, Electrical, Electronics and Communications Engineering, 8.94 at CVR College of Engineering, Hyderabad
Find and Hire Top DevelopersWe’ve analyzed the programming source code of over 60 million software developers on GitHub and scored them by 50,000 skills. Sign-up on Prog,AI to search for software developers.