Sameer Ghewari is a Senior Member of Technical Staff with 12 years of hands-on experience in hardware emulation, FPGA prototyping, and digital verification, currently advancing system validation at AMD in Austin. He has deep expertise with industry-leading emulation platforms (Veloce and ZeBu), SystemVerilog/UVM testbench architecture, and creating reusable, assertion-based, constrained-random, coverage-driven verification environments. His background spans tool vendor roles at Mentor and Synopsys through to chipmaker responsibilities at AMD, giving him a rare perspective on both emulator internals and silicon validation at scale. A master's-trained digital IC designer, he pairs system-level curiosity with practical analog and digital troubleshooting skills that improve correctness across complex systems. As a hobbyist he keeps abreast of system-level insights, often translating those observations into more robust verification strategies.
12 years of coding experience
8 years of employment as a software developer
Master’s Degree Electrical and Computer Engineering Digital IC Design & Verification Computer Architecture, Master’s Degree Electrical and Computer Engineering Digital IC Design & Verification Computer Architecture at Portland State University
Certification VLSI System Engineering & Verification, Certification VLSI System Engineering & Verification at Sandeepani School of VLSI & Embedded Design
Bachelor of Engineering Electronics and Telecommunication Engineering, Bachelor of Engineering Electronics and Telecommunication Engineering at Bharati Vidyapeeth's College of Engineering, Kolhapur (Affiliated to Shivaji University, Kolhapur)
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Sameer Ghewari - Senior Member Of Technical Staff at AMD