Summary
Sangwook Ahn is a veteran analog and memory IP architect with over 30 years in semiconductor design and 10+ years leading product and company strategy as CEO of CDS Lab. He specializes in SRAM and ROM compiler development, SoC memory IP, and analog power and data conversion circuits, with practical layout expertise across nodes from 180nm to cutting-edge FinFET and FDSOI processes. His career blends hands-on circuit/layout work and process qualification for automotive and display interfaces, reflecting roles from principal engineer to director and general manager. He has repeatedly shipped memory and analog IP for diverse fabs (UMC, SEC) and application areas including CIS and AMOLED/TFT drivers. Based in Siheung, South Korea, Sangwook pairs deep technical craftsmanship with founder-level product judgment, often tackling the hardest integration problems between IP, process, and layout. Off the bench he’s the kind of engineer who pairs a quiet love of music with a relentless focus on silicon robustness.
10 years of coding experience
31 years of employment as a software developer
Yeonse
Bachelor of Electronics - BE, Electronic Engineering, Bachelor of Electronics - BE, Electronic Engineering at Yeonse University
Bachelor's degree, Eletronic Engineering, Bachelor's degree, Eletronic Engineering at 연세대학교
Korean, English