Sassoun Gostantian
Senior Verification Engineer
Dallas-Fort Worth Metroplex United States
Summary
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Senior🎓
Top SchoolSassoun Gostantian is a Senior Verification Engineer with 9 years of cross-domain experience in pre- and post-silicon validation, FPGA/ASIC design, and product test engineering focused on NAND/SSD, PCIe, CXL, and NVMe ecosystems. He has led system-level validation at Micron—driving endurance, retention, and UBER characterization on Advantest MPT3000s and tracing failures down to PCB and microscope-level root causes—while also architecting UVM/SystemVerilog testbenches and RISC-V CPU verification at SSRLabs. Skilled in Python, C/C++, and test automation, he consistently reduces manual debug time and boosts throughput by building analytics and lab automation that accelerate failure analysis and firmware collaboration. Recent roles expanded into IP provisioning and customer-facing delivery automation, improving access and release quality across SoC teams. He thrives at the intersection of hardware validation, firmware tuning, and system integration, with a practical knack for turning lab observations into firmware/RTL fixes that prevent field failures.
9 years of coding experience
9 years of employment as a software developer
Master’s Degree Electrical and Electronics Engineering, Master’s Degree Electrical and Electronics Engineering at San José State University
English, Turkish, ArmenianGithub contributions (5)
sassoun/Handwritten-Digit-Recognition
Apr 2017 - May 2017
Contributions:43 commits, 42 pushes, 1 branch in 17 days
sassoun/Network-on-Chip-NOC-
May 2017 - May 2017
Contributions:9 commits, 7 pushes, 1 branch in 1 day
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