Sathyanarayana Nujella
SW Engg at Intel Corporation
California, United States
Summary
👤
Senior🎓
Top SchoolSathyanarayana Nujella is a seasoned software engineer with 20+ years of embedded and multimedia experience and 11 years focused on audio and Chromebook platforms. He has driven Android audio and multimedia stacks for Broadcom mobile chipsets and Samsung devices, and currently works on audio drivers and VP8/VP9 support for Chrome OS at Intel. His expertise spans Audio HAL, ASoC kernel drivers, TinyALSA, OMX codecs, and close collaboration with codec, PMU, modem, DSP and AP teams to integrate third-party audio algorithms. An active contributor to firmware projects like coreboot and Sound Open Firmware, he adapts ACPI/device trees, NHLT tables and audio topologies to enable features such as Wake-on-Voice and new hardware support. Based in California, he combines deep low-level firmware skills with a practical product mindset honed across mobile, SoC and Chromebook ecosystems. Notably, his work often touches both kernel and firmware layers to bridge hardware configuration with consumer audio features.
11 years of coding experience
13 years of employment as a software developer
M. Tech, M. Tech at Indian Institute of Technology, GuwahatiB.Tech, B.Tech at Sri Venkateswara University
Github Skills (20)
dspic10
firmware10
c1110
c1710
audio10
sys10
boot10
embedded10
dspace10
sounds9
device-tree9
gpio9
acpi9
system-configuration7
configurations7
Programming languages (2)
Github contributions (5)
thesofproject/sof
Sep 2019 - Apr 2022
Sound Open Firmware
Role in this project:
Embedded Systems Engineer / IoT Developer
Embedded Systems Engineer / IoT DeveloperContributions:15 reviews, 9 commits, 7 PRs in 2 years 6 months
Contributions summary:Sathyanarayana's contributions primarily involve modifying audio topology configurations for the Sound Open Firmware project. They updated configurations related to Tigerlake audio platforms, including the MAX98373 speaker amp and RT5682 codec. The changes involved adjusting SSP IDs, data formats, and channel configurations, indicating a focus on hardware interaction and audio component integration within the firmware. The user also made modifications to improve the readability of heap trace dumps for memory allocation debugging.
firmwaremidiaudiodspsound
coreboot/coreboot
Jun 2016 - Sep 2018
Read-only mirror of https://review.coreboot.org/coreboot.git. Synced every hour. We don't handle Pull Requests.
Role in this project:Embedded Systems Engineer / IoT Developer
Embedded Systems Engineer / IoT DeveloperContributions:31 commits in 2 years 2 months
Contributions summary:Sathyanarayana primarily focuses on modifying and configuring coreboot firmware for specific Google/Intel hardware platforms. Their contributions involve adapting audio configurations, including DMIC and speaker amplifier settings, within the firmware's ACPI and device tree structures. They make changes to GPIO configurations and NHLT tables, which define audio hardware behavior and enable features like Wake-on-Voice. Furthermore, the user modifies the device tree for new audio hardware support.
corebootfirmwarereviewpull-requestsbootloader
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