Satoshi Matsushita is a founder and technical lead based in San Jose with over a decade of hands-on experience building CPU/FPGA learning systems, heterogeneous edge solutions, and datacenter-scale HPC environments. He combines deep processor-architecture expertise—author of 22 patents and lead on speculative multithreading projects Merlot and Pinot—with practical system engineering from FPGA RTL and UVM validation to InfiniBand-connected vector servers. His career spans research and productization at NEC, collaborations with ARM and MIPS, and a Stanford visiting scholar tenure working on RAMCloud and low-latency systems. Unusually, he has repeatedly bridged chip-level design and production datacenter operations, shipping prototype processors while running a colocated Aurora TSUBASA cluster for AI/ML customers.
10 years of coding experience
32 years of employment as a software developer
MS, Computer Engineering, MS, Computer Engineering at The Graduate School of the University of Tokyo
BS, Electronics, BS, Electronics at 東京大学 / The University of Tokyo
Hamamatsu Kita High School
Quitted, Electric/Electrical Engineering, Quitted, Electric/Electrical Engineering at Kyoto University
Doctor of Philosophy - PhD, Computer Engineering, Doctor of Philosophy - PhD, Computer Engineering at Kyushu University
Visiting Scholar, Computer Science, Visiting Scholar, Computer Science at Stanford University
Contributions:14 pushes, 2 branches in 4 years 11 months
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