Digital Mixed-Signal Modeling And Verification Engineer
Portland, Oregon Metropolitan Area United States
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Summary
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Senior
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Top School
Scott Little is a Digital Mixed-Signal Modeling and Verification Engineer with 12 years of hands-on experience driving AMS design, verification tools, and methodologies at top semiconductor companies including Apple, Intel, Maxim, and Freescale. He has led cross-functional teams to create unified AMS/DMS UVM-based testbench methodologies, authored behavioral models for dozens of analog IPs and PDKs, and reduced verification cycle time through tooling and simulator integration. A recognized industry leader, Scott chaired SystemVerilog-AMS and SV-DC standards efforts and has repeatedly bridged EDA vendors and product teams to deliver practical, production-ready verification solutions. Customer-focused and teaching-oriented, he routinely develops training and automation that scale verification practices across organizations. Based in Portland, he pairs a PhD research background in formal AMS analysis with pragmatic engineering to tackle the hardest mixed-signal verification challenges.
Contributions:5 commits, 1 PR, 4 pushes in 2 years
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Scott Little - Digital Mixed-Signal Modeling And Verification Engineer