Summary
Sean Chen is a Verification Manager with 15 years' experience leading complex SSD and SoC verification programs, currently driving PCIe Gen5, NVMe, DDR (including ECC/L2) and virtual platform efforts at Silicon Motion. He blends deep UVM-based testbench architecture and SystemC TLM co-simulation with practical firmware-aware chip-level flows, enabling faster FW debug, reproducible failure modes, and performance estimation across virtualized A55+cii500 data paths. Sean has a strong track record building in-house buses, arbiters, DMA, VIP integrations and NVMe 1.3/2.0d compliance suites, and has scaled verification practices from mixed UVM/VMM environments to large FPGA-based validation flows. Based in Taiwan, he pairs hands-on technical leadership with tooling and automation work (auto setup_env, cosimulation models) that meaningfully shortens bring-up cycles—his blog and GitHub reflect ongoing curiosity and practical experiments beyond day-to-day projects.
15 years of coding experience
7 years of employment as a software developer
Master's degree Electrical Engineering (VLSI/CAD Group), Master's degree Electrical Engineering (VLSI/CAD Group) at National Cheng Kung University
Bachelor's degree Electrical & Electronics Engineering, Bachelor's degree Electrical & Electronics Engineering at Fu Jen Catholic University