Sebastian Arzayus is a software engineer based in New York with four years of practical experience across high-impact internships and roles at Bloomberg, Notion, Tesla, and Amazon. He blends systems and UI work—contributing to the open-source Verilog-to-Routing FPGA CAD tool by improving search, autocomplete, and visualization features—demonstrating comfort across front-end and low-level engineering. A University of Toronto computer engineering graduate and former TA, he brings strong C++ foundations and experience translating research code into usable UIs and tools. Colleagues describe him as eager to learn and collaborative, with a track record of shipping robust features in both product and research settings.
4 years of coding experience
2 years of employment as a software developer
Bachelor of Applied Science - BASc, Computer Engineering, Bachelor of Applied Science - BASc, Computer Engineering at University of Toronto
Verilog to Routing -- Open Source CAD Flow for FPGA Research
Role in this project:
Full-stack Developer
Contributions:3 reviews, 74 commits, 15 PRs in 3 months
Contributions summary:Sebastian contributed significantly to the UI of the VTR project, focusing on enhancing the search functionality and user experience. Their work involved implementing auto-complete features for block and net names, ensuring efficient searching. The user also addressed formatting issues and added essential checks to improve the robustness of the search feature. The changes also included setting up the initial set up for the UI, integrating new NoC settings with proper show and hide flags
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Sebastian Arzayus - Software Engineer at Bloomberg