Seungmin Woo is a Ph.D. candidate and Graduate Research Assistant at Georgia Tech with eight years of experience across VLSI CAD, advanced packaging, and system-level design for 2.5D integration. He specializes in chiplet and interposer layout co-design, PPA optimization, and signal/power/thermal integrity analysis using commercial EDA flows, and has helped develop assembly design kits for 2.5D/3D platforms. As an undergrad researcher he contributed to academia’s first 3nm PDK and explored block-level physical design techniques including back-side power delivery networks. His background spans device-to-package domains and includes practical systems experience from maintaining tactical aviation communications in the South Korean Air Force. Known for a hands-on, tool-driven approach, he combines deep academic rigor with applied engineering to bridge design and manufacturability. Colleagues note his intellectual tenacity—“nothing is impossible to a willing mind”—which drives his cross-disciplinary problem solving.
8 years of coding experience
4 years of employment as a software developer
Doctor of Philosophy - PhD, Electrical and Computer Engineering, Doctor of Philosophy - PhD, Electrical and Computer Engineering at Georgia Institute of Technology
Bachelor of Science - BS, Electronics Engineering, 4.11/4.3 (Major: 4.26/4.3), Bachelor of Science - BS, Electronics Engineering, 4.11/4.3 (Major: 4.26/4.3) at 경북대학교(Kyungpook National University)
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