Shaunak Saha

CPU Virtual Platforms

California, United States
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Summary

👤
Senior
🎓
Top School
Shaunak Saha is a firmware and systems architect with 11+ years building secure boot, SoC firmware, and kernel solutions for ARM and Intel AI/ML platforms, currently working on CPU virtual platforms at Qualcomm. He designs end-to-end secure firmware stacks (TF-A/TF-M, MCUboot, U-Boot, EDK II, OP-TEE) and implements power and system management using PSCI, SCMI, PLDM/SPDM and PMC integrations. His kernel expertise spans eBPF, ACPI, scheduler optimizations (EAS/PELT/DVFS/FIE) and advanced debugging tooling, and he has delivered measurable power and boot-time improvements on Intel platforms. Shaunak is a hands-on contributor to coreboot (notably Intel PMC/Tiger Lake work) and long-time maintainer of the DDD debugger front-end, reflecting deep open-source roots. He mentors cross-functional teams through architecture to silicon validation and bridges firmware, hardware, compiler and runtime concerns. Based in California, he also experiments with RISC-V microkernel projects, showing a continued interest in low-level research and prototyping.
code11 years of coding experience
job20 years of employment as a software developer
bookB.Tech; C.S.E Computer Science & Engineering, B.Tech; C.S.E Computer Science & Engineering at Institute of Engineering & Management/ West Bengal University of Technology
languagesEnglish
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Github Skills (9)

c1710
firmware10
bios10
embedded10
c1110
sys10
power-management10
boot10
acpi9

Programming languages (1)

C

Github contributions (5)

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coreboot/coreboot

Sep 2015 - Feb 2021

Read-only mirror of https://review.coreboot.org/coreboot.git. We don't handle Pull Requests.
Role in this project:
userEmbedded Systems Engineer / IoT Developer
Contributions:109 commits in 5 years 6 months
Contributions summary:Shaunak's commits primarily focus on adding support for Intel PMC (Power Management Controller) features within the coreboot project. They've added and refactored code related to PMC utilities, including status clearing, enabling/disabling, and power management registers. The contributions also include integrating the PMC with SMM (System Management Mode) and ACPI (Advanced Configuration and Power Interface) for power-related functions and supporting the Tiger Lake platform.
corebootfirmwarereviewpull-requestsbootloader
Contributions:9 commits in 3 months
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Shaunak Saha - CPU Virtual Platforms