Design Methodology Architect CAD, Principal Engineer at IEEE
Beaverton, Oregon, United States
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Summary
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Senior
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Top School
Sherif Mousa is a Design Methodology Architect and Principal Engineer with over a decade of hands-on experience in CAD/EDA, specializing in Calibre DRC, pattern matching, LVS and PERC. He has led PDK specification and program management at Intel and driven product and flow architecture in multiple roles at Mentor Graphics/Siemens, blending deep technical expertise with program leadership. Holder of an M.Sc. (and pursuing PhD work) from Ain Shams University, Sherif also contributes to the field through publications and patents that reflect practical advances in physical verification. Now self-employed in Beaverton, he combines consulting agility with enterprise-grade process knowledge to tackle complex layout and verification challenges. An intriguing personal touch: his GitHub bio quips "I live in the Matrix," hinting at a passion for systems-level thinking that underpins his methodical approach to EDA tools and automation.
10 years of coding experience
11 years of employment as a software developer
Doctor of Philosophy - PhD, Electrical, Electronics and Communications Engineering, Doctor of Philosophy - PhD, Electrical, Electronics and Communications Engineering at Ain Shams University
Contributions:4 pushes, 1 branch in 5 years 9 months
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