Shihpo Hung is a compiler and embedded-systems engineer with 12 years’ experience building low-level software for RISC-V, ARM, and ASIC targets, currently contributing at SiFive from Taiwan. He has deep backend expertise—shaping RISC-V support in Halide and LLVM by implementing instruction cost models, RVV features, and codegen improvements that improve vector performance on modern ISAs. Prior roles at Bitmain and MediaTek honed his skills in AI compiler backends and system initialization for constrained devices, while contributions to an ARM Cortex-M microkernel demonstrate strong hardware-near debugging and memory/linker work. Comfortable across toolchains and silicon, he blends pragmatic engineering with a scholar’s attention to correctness from his computer science master’s background. An interesting detail: his open-source patches often target subtle ABI/configuration and NoOS scenarios, showing a knack for making uncommon platforms first-class citizens in mainstream compilers.
12 years of coding experience
6 years of employment as a software developer
Master of Arts (M.A.), Computer Science, Master of Arts (M.A.), Computer Science at National Chung Cheng University
An efficient and secure microkernel built for ARM Cortex-M cores, inspired by L4
Role in this project:
Embedded Systems Engineer / IoT Developer
Contributions:38 commits in 1 month
Contributions summary:Shihpo primarily contributed to the low-level aspects of the microkernel, focusing on hardware-specific definitions and initialization. They added definitions for debug registers and improved the interrupt handling and initialization procedures. The user also updated linker scripts and memory management configurations, demonstrating an understanding of embedded system architecture. Furthermore, the user added support for kernel probes, including implementing breakpoint functionality using the FPB and DWT, indicating strong skills in debugging and system-level programming.
The LLVM Project is a collection of modular and reusable compiler and toolchain technologies.
Role in this project:
Back-end Developer & Compiler Engineer
Contributions:204 reviews, 1 commit, 80 PRs in 1 day
Contributions summary:Shihpo primarily contributed to the LLVM compiler project, focusing on enhancing the RISC-V backend. Their work involved implementing and refining instruction cost models for various RISC-V vector instructions. They also addressed issues related to instruction selection and code generation, improving the compiler's ability to optimize code for RISC-V architectures. The user's commits showcase a deep understanding of compiler internals and target architecture optimization.
compilerstechnologiesclangsubmittoolchain
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