Summary
Sho Ko is a Core Architect with eight years of experience at the intersection of computer architecture, AI/ML, and VLSI hardware, currently driving core design at I Machines, Inc. He has held architect roles at NVIDIA, Micron, and Meta, bringing practical experience in scaling hardware-aware software frameworks and compilers for deep learning workloads. Trained at Georgia Tech and Stanford, Sho blends rigorous academic grounding with production-focused system design across both chip and software stacks. He specializes in optimizing ML/LLM execution through co-design of hardware and compiler/runtime layers, enabling tighter performance and efficiency trade-offs. Known for translating complex research ideas into deployable engineering solutions, Sho often bridges teams across silicon, firmware, and model-engineering domains. Beyond core projects, he has a penchant for exploring novel compiler techniques that squeeze extra efficiency from existing accelerators.
8 years of coding experience
Georgia Institute of Technology
Stanford University