Summary
Sitiporn Lim is a Senior Machine Learning Engineer based in Bangkok with 8 years of experience at the intersection of causal mediation analysis, deep learning, and NLP. Currently at AI GEN, she brings a research-driven mindset honed through ACL‑accepted work on annotation bias mitigation and Thai sentence embedding benchmarks while at VISTEC. Her background spans applied research and production engineering—from few‑shot intent interpretability and EEG-inspired forecasting to embedded C/C++ and robotics GUIs—enabling her to translate academic insights into deployable systems. She pairs rigorous empirical methods with hands‑on implementation, often focusing on interpretability and bias reduction in language models. Known for a persistent, solution-oriented attitude—“not a question of will, but of finding a way”—she combines curiosity about language representation with practical product impact.
8 years of coding experience
5 years of employment as a software developer
Master's degree, Master of Engineering in Data Science and Artificial Intelligence, Master's degree, Master of Engineering in Data Science and Artificial Intelligence at Asian Institute of Technology