Son Le
Staff Formal Verification Engineer
Portland, Oregon, United States
Summary
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Senior🎓
Top SchoolSon Le is a Staff Formal Verification Engineer at Intel with 10 years of experience blending formal methods and embedded systems expertise. He specializes in datapath verification, temporal-logic modeling, and SMT/SAT-based proof encodings (SMT-LIB, Z3) and has practical experience with commercial tools like JasperGOLD SEC. A former PhD researcher in Formal Verification Methodologies for NULL Convention Logic, he brings deep academic rigor to industrial verification problems and a knack for translating first-order properties into machine-checkable proofs. Earlier roles as an Embedded Linux developer gave him full-stack embedded experience—from kernel and u-boot drivers to Qt applications and Yocto-based distribution builds—enabling him to bridge hardware, firmware, and software verification. Based in Portland, OR, he combines research-driven techniques with production-focused tooling to improve processor datapath correctness at scale.
10 years of coding experience
9 years of employment as a software developer
Doctor of Philosophy (PhD) Computer Engineering, Doctor of Philosophy (PhD) Computer Engineering at North Dakota State University
English, Vietnamese
Github Skills (4)
dedicated-server9
dotnet8
typescript3
uploading2
Programming languages (1)
Github contributions (5)
sonnle/sample_c
Aug 2015 - Apr 2016
Contributions:4 PRs, 10 pushes, 2 branches in 8 months
uploadingprograms
sonnle/ncl_formal_verification
Aug 2019 - Jan 2021
Contributions:5 pushes, 1 branch in 1 year 5 months
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