Sorrasit Bunluehan
Staff Digital Hardware Design Engineer at Racyics
Dresden, Saxony, Germany
Summary
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Senior🎓
Top SchoolSorrasit Bunluehan is a Staff Digital Hardware Design Engineer based in Dresden with a decade of hands-on experience bridging firmware, FPGA design and machine learning. He specializes in VHDL-based FPGA accelerators and embedded C/C++ development, having designed a convolutional neural network accelerator for his master's and optimized Mask R-CNN workflows in applied research. Comfortable across the full FPGA flow, AXI interfaces and DMA performance trade-offs, he combines hardware timing closure expertise with software-driven image processing and deep learning. Self-taught across many tools and languages, he brings a maker’s curiosity—evident from robotics and IoT firmware projects—to production-grade engineering. Known for preferring elegant, minimal solutions, he pairs creativity with strong analytical and time-management skills to deliver efficient, reliable designs.
10 years of coding experience
2 years of employment as a software developer
Bachelor's degree, Department of Control System and Instrumentation Engineering, 3.15, Bachelor's degree, Department of Control System and Instrumentation Engineering, 3.15 at King Mongkut's University of Technology ThonburiMaster of Science - MS, Control, Microsystems, Microelectronics (CMM), Master of Science - MS, Control, Microsystems, Microelectronics (CMM) at University of Bremen
Stackoverflow
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Github Skills (4)
convolution4
fpga4
accelerator3
neural-network2
Programming languages (3)
Github contributions (5)
SorrasitBunluehan/MS.CnnAccFPGA
Nov 2020 - Feb 2021
Master Thesis on the topic of create an HW Convolution Neural Network Accelerator based FPGA
Contributions:40 commits, 2 PRs, 32 pushes in 2 months
convolutionmasterneural-networkmaster-thesisthesis
moun1234/FreeRTOSMicrogear
Apr 2017 - May 2017
Contributions:40 pushes, 1 branch in 1 month
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