Sreyas Mirthipati is a Senior Design Verification Engineer with 11 years of experience specializing in ASIC and silicon verification, currently working at NVIDIA after leading verification efforts on Microsoft’s Azure Maia AI accelerator. A Purdue Computer Engineering alum with early hands-on roles at AMD and Groq, he blends deep UVM/SystemVerilog simulation debugging with automation scripting and testbench maintainability practices. He has a track record of shipping silicon-focused verification in large-scale organizations and has contributed to both academic and industry teams, including HoloLens custom silicon and ASIC design labs. Based in Mountain View, he pairs rigorous verification methodology with practical tooling improvements—often automating repetitive workflows to accelerate regression turnaround.
11 years of coding experience
7 years of employment as a software developer
Bachelor’s Degree, Computer Engineering, Bachelor’s Degree, Computer Engineering at Purdue University
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