Summary
Srinivas Vaidya is a performance-focused microarchitecture and compiler engineer with 11 years of experience building and modeling processors and GPUs, currently working on processor microarchitecture performance modeling at IBM India Labs. He has deep expertise in compiler optimization, workload characterization, and pre-silicon performance verification for IBM POWER processors, having driven XL and GCC optimization work across inlining, vectorization, loop transformations, and instruction scheduling. Earlier, he designed and developed a functional/performance C++ simulator for Intel GPU architectures, blending architectural modeling with practical simulator engineering. An LLVM enthusiast with a master's in computer science from IIIT Bangalore, he also writes technical blog posts dissecting compiler and performance topics and maintains a hands-on interest in computer graphics and visualization. A not-obvious strength is his cross-domain fluency—bridging low-level compiler heuristics, simulator design, and workload-driven microarchitecture validation to improve real-world processor performance.
11 years of coding experience
8 years of employment as a software developer
Bachelor of Engineering (B.E.) Computer Software Engineering, Bachelor of Engineering (B.E.) Computer Software Engineering at Visvesvaraya Technological University
Master’s Degree Computer Science, Master’s Degree Computer Science at International Institute of Information Technology Bangalore
English, Hindi, Kannada