Summary
Srinivasan Venkataramanan is a VLSI verification leader and serial founder with nearly a decade of executive experience spanning the UK, US (San Jose) and India, currently serving as CEO of AsFigo and VerifWorks while also CTO at CVC. He combines deep hands‑on expertise in SystemVerilog, UVM/OVM/VMM, assertions and formal methods with a pragmatic ability to translate customer verification challenges into product roadmaps and trainings. A published co‑author of seminal books on verification and an active DVCon/DAC program committee contributor, he frequently presents and teaches SVA, UVM and methodology workshops to global semiconductor teams. His background blends design‑house and EDA perspectives—from multi‑million gate ASIC verification to tooling and ML efforts at Synopsys—giving him a rare cross‑industry lens. He also leads Go2UVM on GitHub, an on‑ramp that accelerates UVM adoption, reflecting a knack for turning complex standards into usable starter kits. Trained at IIT Delhi (M.Tech VLSI) and an electrical engineering graduate from TCE Madurai, he is known for a calm demeanor that hardens into uncompromising technical rigor when solutions matter.
9 years of coding experience
18 years of employment as a software developer
Indian Institute of Technology Delhi (IIT Delhi)
Bachelor of Engineering EE, Bachelor of Engineering EE at Thiagarajar College of Engineering