Staf Verhaegen
Co-Founder at The AROS Developer Team
Antwerp Metropolitan Area Belgium
Summary
👤
Senior🎓
Top SchoolStaf Verhaegen is a co-founder and seasoned ASIC/EDA engineer with 13+ years building SRAM IP, testchips and design-for-manufacturing flows, backed by two decades of hands-on research and project engineering at IMEC. He blends deep analog/digital silicon expertise—(computational) lithography, radiation-hardened design and DoE—with strong software skills in data mining and programming, evidenced by meaningful backend contributions to popular open-source projects like cocotb and PySpice. Based in Antwerp, he runs ChipFlow and FibraServi while maintaining long-term volunteer work on the AROS OS, showing a quirky continuity from classic home computers to modern chips. Pragmatic and curious, he often sits at the intersection of hardware, verification software, and manufacturing analytics, turning complex process-data into robust, testable silicon.
13 years of coding experience
24 years of employment as a software developer
engineer, engineer at KULeuven
Dutch, English
Github Skills (11)
simulations10
circuit10
simulation10
verification10
python10
simulator10
spice10
cocotb10
testing10
vhdl9
verilog9
Programming languages (11)
Github contributions (5)
cocotb/cocotb
Nov 2019 - Jan 2020
cocotb: Python-based chip (RTL) verification
Role in this project:
Backend Developer
Backend DeveloperContributions:8 commits, 18 PRs, 97 comments in 1 month
Contributions summary:Staf primarily contributed to the cocotb project by modifying core driver and monitor classes written in Python. Their work involved refactoring code to improve initialization, adding flexibility through keyword arguments, and deprecating outdated classes. The user also removed the AD9361 driver and updated the documentation to include Waitable within the library reference. These contributions demonstrate a focus on improving code structure, maintainability, and API design within the verification framework.
uvmpythonvhdlcosimulationcoroutine
PySpice-org/PySpice
Apr 2020 - Sep 2020
Simulate electronic circuit using Python and the Ngspice / Xyce simulators
Role in this project:Back-end Developer
Back-end DeveloperContributions:5 commits, 7 PRs, 4 comments in 5 months
Contributions summary:Staf contributed to the PySpice project by implementing and improving features related to circuit simulation. They added support for .nodeset initial conditions, allowing for more control during DC and transient simulations. Further enhancements included adding support for spice library (.lib) files and incorporating DC temperature sweep capabilities. The user also made improvements to the PWL (piecewise linear) source support, addressing warnings and enhancing its functionality.
circuit-simulationpyspicepythonsimulatorscircuit
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