Stafford Horne
Software Engineer at SMBC Nikko Securities Inc.
Chiyoda, Japan
Summary
🤩
Rockstar🎓
Top SchoolStafford Horne is a seasoned software engineer with 20 years of experience specializing in C and Java development on Linux, large-scale distributed systems, and deployment pipelines. He combines enterprise banking experience at Morgan Stanley and SMBC Nikko with deep open-source expertise in embedded systems—contributing to the Linux kernel, glibc, gcc/gdb/binutils, and OpenRISC hardware projects. As the Linux kernel OpenRISC architecture maintainer, he has driven toolchain and FPGA SoC integration work, including upstream contributions to LiteX and mor1kx that enable new CPU features and hardware support. Comfortable from assembly-level debugging to systems architecture, he is particularly adept at porting and optimizing low-level code for niche architectures. Based in Chiyoda, Japan, he brings a rare blend of production-grade Java systems design and hands-on hardware/firmware engineering.
20 years of coding experience
15 years of employment as a software developer
BS, Computer Engineering, BS, Computer Engineering at San José State University
English, Japanese, Chinese
Github Skills (37)
verilog10
assembly10
system-programming10
multithreading10
qemu10
compiler-development10
linux10
build-system10
c1110
hardware10
gcc10
vhdl10
c1710
device-tree10
exception-handling10
Programming languages (15)
Github contributions (5)
openrisc/mor1kx
Nov 2017 - May 2022
mor1kx - an OpenRISC 1000 processor IP core
Role in this project:
Back-end Developer
Back-end DeveloperContributions:2 releases, 111 reviews, 121 commits in 4 years 6 months
Contributions summary:Stafford primarily focused on fixing and improving the OpenRISC 1000 processor IP core's Verilog code. Their contributions include resolving iverilog and modelsim compile errors related to constant expressions and function calls. The user implemented a sign extension instruction and corrected issues with the LSU's full flag and cache refill errors. They also made improvements to the branch prediction logic.
openriscverilog
enjoy-digital/litex
Oct 2018 - Jan 2022
Build your hardware, easily!
Role in this project:Embedded Systems Engineer
Embedded Systems EngineerContributions:15 reviews, 17 commits, 10 PRs in 3 years 4 months
Contributions summary:Stafford primarily contributes to the LiteX project, focusing on hardware and embedded systems development. Their commits address compiler warnings, improve UART communication, enable specific CPU features (like CMOV, rotate, and FPU instructions) for the OpenRISC mor1kx CPU, and generate device tree settings for interrupt configuration and initrd. Additionally, they've added support for the Marocchino OpenRISC core. Their work often involves low-level system configuration and integration, improving system performance and supporting new hardware features.
vhdlsystem-on-chipedasochardware
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