Stephen Grace
Advance Software Engineer at General Dynamics Mission Systems
Longmont, Colorado, United States
Summary
👤
Senior🎓
Top SchoolStephen Grace is an advanced software engineer with 8 years of hands-on experience building and verifying complex embedded and application software across industries from aerospace to medical imaging. He has deep expertise in verification, Vitis/FPGA toolchains, and integrating AI runtimes (TensorFlow Lite) into embedded Linux, and has published practical Vitis tutorials used by the community. Stephen excels at cross-functional collaboration and improving development practices—introducing TDD and high coverage goals at E.I. Medical Imaging and driving verification automation at Xilinx. Based in Longmont, Colorado, he pairs low-level HDL and waveform simulation experience with higher-level C++/Qt and Yocto product work, making him effective across the full embedded stack. An understated strength is his knack for translating complex hardware-software interactions into clear tutorials and test frameworks that accelerate adoption and troubleshooting.
8 years of coding experience
16 years of employment as a software developer
BS Computer and Electrical Engineering, BS Computer and Electrical Engineering at University of WyomingHigh School Diploma, High School Diploma at Columbine High School
Stackoverflow
1reputation
0reached
0answers
0questions
Github Skills (7)
fpga10
vitis10
embedded10
verilog10
sys10
windowsrt9
hdl9
Programming languages (3)
Github contributions (4)
Xilinx/Vitis-Tutorials
Jan 2021 - Aug 2021
Vitis In-Depth Tutorials
Role in this project:
Embedded Systems Engineer / IoT Developer
Embedded Systems Engineer / IoT DeveloperContributions:74 commits in 6 months
Contributions summary:Stephen primarily contributed to the development of AI Engine (AIE) related tutorials, focusing on hardware description language (HDL) code and software integration. The commits included updates to Makefiles, the addition of new tutorials (09-custom-platform-emulation), and the integration of AIE cores with PL kernels. Further contributions involved waveform analysis, where the user appears to have set up the simulation environment for waveform analysis of AIE and PL interactions.
vitiskriadepthaienginealveo
Xilinx/Vitis-In-Depth-Tutorial
Jan 2021 - Feb 2021
Contributions:10 commits in 15 days
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