Summary
Steve Hu is a systems engineer with 12+ years focused on storage, backup, and disaster recovery and deep expertise in storage software and hardware co-design. He has led architecture and firmware for multiple generations of PCIe/NVMe, SATA, and SAS controllers, delivering high-throughput SSD controllers and RDMA/NVMe-oF bridges verified on FPGA and simulator platforms. Equally fluent in low-level C/C++, assembly, Linux/RTOS internals and FPGA/ASIC workflows, he’s implemented SCSI/Fibre Channel/SAS targets, device drivers, and Log-Structured Array storage engines. His background spans MCU/ARM/PowerPC hardware design and Verilog, with hands-on experience integrating RISC-V cores and extending PCIe PHYs for production-grade performance. Steve holds two patents and a track record of sole-contributor modules that doubled DMA performance or enabled multi-gigabit line-rate fabrics—skills that make him effective at both pre-silicon architecture and post-silicon performance tuning. Based in San Jose, he combines reverse-engineering instincts with pragmatic simulator/tooling work to shorten firmware/RTL development cycles.
12 years of coding experience
11 years of employment as a software developer
English, Chinese