Stuart Siroky

Principal Verification Engineer

Austin, Texas Metropolitan Area United States
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Summary

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Senior
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Top School
Stuart Siroky is a Principal Verification Engineer with over a decade of experience building SystemVerilog testbenches and verification environments for high-performance networking processors, currently driving verification at Qualcomm in the Austin area. He brings deep expertise in Vera, VCS, and SystemVerilog, honed across a progression of roles at semiconductor leaders including RMI, Agere, Freescale, and Motorola. Stuart pairs hands-on RTL verification and design experience with an MS in Computer Software Engineering (4.0), enabling him to bridge hardware-focused verification practices with rigorous software-driven test methodologies. Known for tackling complex protocol and processor verification challenges, he often blends legacy verification techniques with modern SystemVerilog methodologies to accelerate silicon bring-up.
code12 years of coding experience
job10 years of employment as a software developer
bookMS, Computer Software Engineering, 4.0, MS, Computer Software Engineering, 4.0 at Texas State University
bookBS, Electrical and computer Engineering, BS, Electrical and computer Engineering at University of Colorado at Boulder
languagesEnglish

Github contributions (5)

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stuartsiroky/CFG_generator

Mar 2014 - Feb 2015

Contributions:2 commits, 1 push in 11 months
stuartsiroky/NoSwingCalc

Jan 2015 - Mar 2015

Contributions:5 pushes in 2 months
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Stuart Siroky - Principal Verification Engineer