Summary
Stuart Siroky is a Principal Verification Engineer with over a decade of experience building SystemVerilog testbenches and verification environments for high-performance networking processors, currently driving verification at Qualcomm in the Austin area. He brings deep expertise in Vera, VCS, and SystemVerilog, honed across a progression of roles at semiconductor leaders including RMI, Agere, Freescale, and Motorola. Stuart pairs hands-on RTL verification and design experience with an MS in Computer Software Engineering (4.0), enabling him to bridge hardware-focused verification practices with rigorous software-driven test methodologies. Known for tackling complex protocol and processor verification challenges, he often blends legacy verification techniques with modern SystemVerilog methodologies to accelerate silicon bring-up.
12 years of coding experience
10 years of employment as a software developer
MS, Computer Software Engineering, 4.0, MS, Computer Software Engineering, 4.0 at Texas State University
BS, Electrical and computer Engineering, BS, Electrical and computer Engineering at University of Colorado at Boulder
English