Sugandha Gupta
Hardware Engineer at Google
San Jose, California, United States
Summary
🤩
Rockstar🎓
Top SchoolSugandha Gupta is a hardware engineer with a decade of experience designing and verifying ASIC and FPGA systems, currently applying her expertise at Google in San Jose. She has a strong track record in RTL design and verification using Verilog/VHDL and SystemVerilog, plus software skills in C++ and Python that bridge firmware, drivers and FPGA ecosystems. At Ettus Research she led cross-functional teams to ship USRP products, maintained the flagship FPGA HDL repo and contributed notable fixes and DUC/DDC optimizations to the widely used Ettus FPGA and UHD projects. Her background includes SoC-level verification at NVIDIA and device integration work at Intel, giving her deep exposure to timing closure, CTS experiments and power-management verification. Trained in Computer Architecture and VLSI with a Master’s from the University of Michigan, she combines product-focused engineering with open-source stewardship and customer-facing problem solving. Peers describe her as someone who preserves backward compatibility while evolving complex RF/FPGA designs—an engineer equally comfortable in silicon, firmware and open-source drivers.
10 years of coding experience
7 years of employment as a software developer
B.E, Electronics and Communication, B.E, Electronics and Communication at Netaji Subhas Institute of TechnologyMaster's Degree, Electrical and Computer Engineering (Computer Architecture and VLSI), Master's Degree, Electrical and Computer Engineering (Computer Architecture and VLSI) at University of MichiganMontfort Senior Secondary School, Delhi
English, Hindi
Github Skills (10)
fpga10
verilog10
embedded10
uhd10
driver10
sys10
sdl10
cprogramming-language9
c-language9
dd9
Programming languages (3)
Github contributions (5)
EttusResearch/fpga
May 2016 - Dec 2019
The USRP™ Hardware Driver FPGA Repository
Role in this project:
Embedded Systems Engineer
Embedded Systems EngineerContributions:148 commits, 1 comment in 3 years 7 months
Contributions summary:Sugandha primarily contributed to the FPGA repository, working on USRP hardware drivers. Their commits demonstrate expertise in Verilog, specifically in the context of RFNoC (RF Network-on-Chip) FPGA development. The user fixed syntax errors, implemented and tested features for the DUC (Digital Up Converter) and DDC (Digital Down Converter) chain, and made optimizations to various hardware blocks. Furthermore, the user modified existing designs with a focus on maintaining backward compatibility.
xilinxlatticeusrphardwarefpga
EttusResearch/uhd
May 2016 - Dec 2019
The USRP™ Hardware Driver Repository
Role in this project:Embedded Systems Engineer / IoT Developer
Embedded Systems Engineer / IoT DeveloperContributions:105 commits, 2 branches in 3 years 8 months
Contributions summary:Sugandha primarily contributed to the USRP™ Hardware Driver Repository by fixing issues related to hardware drivers, specifically concerning the x300 and e300 series. They fixed an error in setting the `recv_frame_size`, addressed doxygen warnings, and fixed product name display, indicating their focus on hardware-specific code. Furthermore, their commits involved fixing issues related to the MPM architecture, including port expander and Ethernet configuration, suggesting a deep understanding of the underlying hardware and its software interface.
driverusrphardwaresdruhd
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