Suhas Pai
Sr. Systems Engineer at Intel Corporation
San Diego, California, United States
Summary
👤
Senior🎓
Top SchoolSuhas Pai is a senior systems engineer with 25+ years of R&D experience building wired and wireless chip architectures and leading pre-Si co-simulation and co-validation efforts. At Intel he architects C++/SystemC models and emulation transactors for Compute Express Link, PCIe and UCIe, drawing on a long history of pioneering co-emulation and pre‑Si power modeling at Qualcomm. He blends deep hardware-software co‑design expertise (including Bluespec/SystemVerilog synthesizable transactors) with hands-on system-level performance analysis and rapid proof-of-concept delivery. A PhD-trained engineer who started in signal processing and embedded DSP at Bell Labs, he uniquely bridges academic rigor and pragmatic lab bring‑ups across multi-disciplinary teams. Based in San Diego, he continues to push pre-silicon validation forward, often surfacing hard-to-find bugs before silicon is taped out.
9 years of coding experience
28 years of employment as a software developer
Master of Science (MS), Aerospace Engineering, Master of Science (MS), Aerospace Engineering at The University of Texas at ArlingtonIndian Institute of Technology Bombay
Stackoverflow
45reputation
34kreached
3answers
2questions
Github Skills (7)
concurrent7
linux6
curl6
embeddedresource6
concurrency6
manifest6
java6
Programming languages (1)
Github contributions (5)
suhasspai/bitsfc-website
Aug 2016 - Feb 2017
Contributions:4 pushes, 2 branches in 6 months
suhasspai/recipe-cuisine-mining
Oct 2017 - Nov 2017
Contributions:6 pushes, 1 branch in 1 month
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