Sumeet Borkar
SoC Design Engineer at Alphawave Semi
Bengaluru, Karnataka, India
Summary
👤
Senior🎓
Top SchoolSumeet Borkar is a SoC Design Engineer with 12 years of experience specializing in frontend SoC design, IP integration, and power management for client platforms. He holds an MTech in VLSI Design and has driven PMU implementation and integration work at Intel, covering FI-VR, BGR, sensors, DFS/DVFS, and multi-VT flows. Sumeet has contributed to microarchitecture specs, ECOs, EDA tool integration, and mentoring junior engineers, and now applies that expertise at Alphawave Semi. Beyond RTL and IP work, he is an active firmware and kernel contributor—working on coreboot adaptations for Alder Lake, Tiger Lake and Jasper Lake to improve thermal control, ACPI and fan/EC support. That blend of silicon-front-end design and low-level firmware/kernel contributions gives him a rare cross-domain perspective on power, thermal and platform behavior. Based in Bengaluru, he brings pragmatic problem-solving from chip design to production firmware.
12 years of coding experience
6 years of employment as a software developer
Master of Technology (MTech), VLSI Design, Master of Technology (MTech), VLSI Design at Vellore Institute of TechnologyBachelor of Engineering (B.E.), Electronics Engineering, Bachelor of Engineering (B.E.), Electronics Engineering at Sri. Ramdeobaba Kamla Nehru Engineering College, Katol Road
Github Skills (11)
c1710
firmware10
cpu-architecture10
c1110
intel10
boot10
architecture10
acpi10
power-management10
computer-architecture10
system-programming9
Programming languages (1)
Github contributions (5)
coreboot/coreboot
Oct 2015 - Oct 2022
Read-only mirror of https://review.coreboot.org/coreboot.git. We don't handle Pull Requests.
Role in this project:
Back-end Developer & Firmware Engineer
Back-end Developer & Firmware EngineerContributions:170 commits in 7 years 1 month
Contributions summary:Sumeet primarily contributed to the coreboot firmware, focusing on power management and thermal control. Their contributions include implementing and modifying Dynamic Platform Thermal Framework (DPTF) settings, including power limits and sensor configurations. The user's work involved adapting the firmware for various Intel platforms (e.g., Alder Lake, Tiger Lake, and Jasper Lake) and fixing thermal shutdown issues. Furthermore, they modified ACPI tables and added support for fan speed control using EC.
corebootfirmwarereviewpull-requestsbootloader
Amersel/coreboot
May 2021 - Oct 2021
github mirror of coreboot.org's master repository
Contributions:17 commits in 4 months
corebootmastergithub-mirror
Find and Hire Top DevelopersWe’ve analyzed the programming source code of over 60 million software developers on GitHub and scored them by 50,000 skills. Sign-up on Prog,AI to search for software developers.