Sven Mueller is a seasoned design engineer with over 15 years of hands-on experience delivering physical and digital IC designs for complex multi-million-gate SoCs, currently working as SMTS Design Enablement at GLOBALFOUNDRIES in Dresden. He has deep expertise across RTL-to-GDS flows, partition-level place & route, floorplanning, clock and power distribution, timing closure and full physical/electrical verification down to 7nm process nodes. Prior roles at AMD gave him strong RTL and netlist experience in high-speed interfaces (HyperTransport, PCIe, Ethernet) and memory controllers, informing a pragmatic view of power/performance/area trade-offs. Proficient with industry EDA toolchains (Synopsys, Cadence, Mentor) and languages like Verilog, VHDL, Tcl and Perl, he thrives in multi-site Linux environments and design enablement contexts. Notably, he blends CPU microarchitecture familiarity with practical SOC implementation know-how, enabling efficient handoffs between architecture and physical design teams. Based in Germany, Sven combines deep technical breadth with a track record of shipping production silicon in advanced process technologies.
15 years of coding experience
9 years of employment as a software developer
Diploma, Electrical and Electronics Engineering, Diploma, Electrical and Electronics Engineering at Fachhochschule Jena
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Sven Mueller - SMTS Design Enablement at GLOBALFOUNDRIES