Takeshi Matsuya
特任講師 at 慶應義塾大学大学院
Shinagawa, Japan
Summary
👤
Senior🎓
Top SchoolTakeshi Matsuya is a seasoned engineer and researcher with 16+ years building low-latency, high-speed networking systems and security products, combining hands-on C, Verilog and Linux kernel development with FPGA and PCIe expertise. As a 特任講師 at Keio University and long-time freelancer he has led both academic research (low-latency P2P/IP-NUMA, smartNICs) and commercial product development such as L2Blocker and Fire Logic, and holds related patents and conference publications. He designs across the stack—from native and web applications and SQL schemas to kernel drivers and FPGA logic—focusing on sub-microsecond PtoP latency and 10/100Gbps environments. Notably, his work includes a DPDK-based high-speed TCAM L2 switch and a retrofit firewall that preserves network topology, reflecting a knack for practical, deployable innovations. Based in Shinagawa, Japan, he blends university mentorship and industry project leadership to translate cutting-edge research into shipping network-security products.
16 years of coding experience
環境情報学部, 環境情報学部 at 慶應義塾大学博士, 政策・メディア研究科, 博士, 政策・メディア研究科 at 慶應義塾大学大学院
Github Skills (7)
soc6
cpp4
arch3
kernel3
linux-kernel3
linux2
acceleration2
Programming languages (1)
Github contributions (5)
sora/ethpipe
Jan 2013 - Dec 2013
Contributions:210 commits in 11 months
tmatsuya/ipnuma
Jun 2013 - Sep 2017
Contributions:217 commits, 33 pushes in 4 years 3 months
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