Teng Wang

Engineering Manager at Apple

Seattle, Washington, United States
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Summary

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Teng Wang is an engineering manager and seasoned hardware designer with two decades of experience in digital and ASIC design, currently leading circuit teams at Apple in Seattle. He has a proven track record building characterization, QA and frontend modeling flows at Qualcomm that became daily execution tools and led distributed teams across the US and India. Technically fluent in VHDL/Verilog, Synopsys, Cadence and mixed-signal verification, he’s delivered high-speed timing loops, Sigma-Delta A/D modules and VLIW processor blocks from tapeout to production. Teng pairs deep hands-on RTL and CAD tool expertise with management of cross-cultural engineering teams, and has a PhD-level electrical engineering background that informs his methodical, measurement-driven approach. A wry sense of humor on GitHub (“Chief BaiLan Officer”) hints at an approachable leader who values pragmatic engineering and team culture.
code6 years of coding experience
job15 years of employment as a software developer
bookBachelor, Electrical Engineering, Bachelor, Electrical Engineering at University of Science and Technology of China
bookPhD, ECE, PhD, ECE at University of Massachusetts Amherst
bookMaster, ASIC design, Master, ASIC design at Chinese Academy of Sciences
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Github Skills (69)

python10
datasets10
deep-learning10
machine-learning10
neural-network9
data-science9
tensorflow9
ml8
numpy8
compression8
clustering8
deep-neural-networks8
nearest-neighbors7
gpu7
optimization7

Programming languages (7)

TypeScriptC++ShellJavaScriptJupyter NotebookMATLABPython

Github contributions (5)

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DO "OUT OF DOMAIN" ASPECTED BASED SENTIMENT ANALYSIS
Contributions:43 commits, 1 PR, 42 pushes in 5 months
tengwang0318/article

Jan 2021 - Jun 2021

Contributions:6 commits, 5 pushes, 1 branch in 4 months
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Teng Wang - Engineering Manager at Apple