Summary
Thomas Bollaert is a Senior Technical Director specializing in domain-specific architectures, HW accelerators, and heterogeneous computing, with eight years in senior leadership roles and a career spanning FPGA toolchains, EDA, and AI/ML developer ecosystems. Currently at AMD, he drives adoption of development tools and SDKs for Ryzen AI and media/acceleration toolchains, building on a track record leading Vitis FPGA acceleration tools at Xilinx and HLS/formal verification efforts at Mentor Graphics. He blends deep technical expertise in hardware design flows (VHDL/Verilog/SystemC), HLS, OpenCL and parallel programming with product management and technical marketing to translate complex hardware capabilities into usable developer experiences. Known for shepherding strategic change across startups and large vendors, he couples hands-on engineering insight with customer-facing leadership to accelerate time-to-market. Based in Portland, Oregon, he brings a pragmatic focus on making accelerators accessible to software teams—often by simplifying compiler and toolchain workflows that are usually invisible to end users.
9 years of coding experience
22 years of employment as a software developer
Master of Science, Electronics, Computer Architectures, Master of Science, Electronics, Computer Architectures at ESIEE
English, French